VLSI芯片的可测试性、可调试性、可制造性和可维护性设计  

VLSI Design for Testability,Debuggability,Manufacturability,and Serviceability

作　　者：沈理[1] 

机构地区：[1]中国科学院计算技术研究所,北京100080

出　　处：《计算机工程与科学》2003年第1期92-97,共6页Computer Engineering & Science

基　　金：国家863计划资助项目(2001AA111100)

摘　　要：CMOS器件进入深亚微米阶段,VLSI集成电路(IC)继续向高集成度、高速度、低功耗发展,使得IC在制造、设计、封装、测试上都面临新的挑战。测试已从IC设计流程的后端移至前端,VLSI芯片可测试性设计已成为IC设计中必不可少的一部分。本文介绍近几年来VLSI芯片可测试性设计的趋势,提出广义可测试性设计(TDMS技术)概念,即可测试性、可调试性、可制造性和可维护性设计,并对可调试性设计方法学和广义可测试性设计的系统化方法作了简单介绍。CMOS device dimensions have been down to the deep-submicro. VLSL chips are going toward higher density,higher speed and lower power dissipation, making new challenges on IC fabrication, design, packaging, and testing. For the IC testing, testing has been moved from the end design to the front one. VLSI design for testability ( DFT) has become a very important part of IC design. The paper introduces the trend of DFT in recent years. A concept of generalized DFT (TDMS technology) is presented, that is,the design for testability (DFT) ,the design for debuggability (DFD), the design for manufacturabiliy (DFM), and the design for serviceability (DFS) . The methodology of DFD and the systematic methods of generalized DFT are given.

关 键 词：VLSI芯片 可测试性 可调试性 可制造性 可维护性 设计 超大规模集成电路 

分 类 号：TN47[电子电信—微电子学与固体电子学]