FPGA设计中竞争冒险问题的研究  

Research of the Competition Risk Problem in Field Program Gates Array(FPGA) Circuits Design

作　　者：张晴[1] 

机构地区：[1]上海交通大学电子信息与电气工程学院电工及电子技术实验中心,上海200240

出　　处：《实验室研究与探索》2003年第1期47-49,62,共4页Research and Exploration In Laboratory

摘　　要：以现场可编程门阵列(以下简称FPGA)在设计中由于其内部构成,容易引起竞争问题。以我们在实验教学中的应用与实践为主线,详细介绍了消除竞争冒险的各种方法。It is easy to cause competition risk problem in Field Program Gates Array (FPGA for short below) circuits design due to its internal mechanism. Based on the applications and exploration of FPGA in electronic engineering experiment teaching, this paper introduced many kinds of method to avoid the competition risk in FPGA design.

关 键 词：现场可编程门阵列 实验教学 FPGA设计 竞争冒险现象 

分 类 号：TN7－4[电子电信—电路与系统] G642.423[文化科学—高等教育学]