软硬件协同验证系统平台间通讯设计  

Communication Design for Hardware and Software Co-verification Platform

作　　者：朱明[1] 边计年[1] 薛宏熙[1] 

机构地区：[1]清华大学计算机系设计自动化实验室,北京100084

出　　处：《计算机工程与应用》2003年第27期122-124,共3页Computer Engineering and Applications

基　　金：国家自然科学基金项目(编号:69873026);国家973重点基础研究发展规划资助(编号:G1998030403)

摘　　要：软硬件协同设计是软件、硬件的并行设计,包括系统描述、软硬件划分、设计实现和软硬件协同验证等几个阶段[1]。软硬件协同验证同时验证软件和硬件,使用处理器仿真器进行协同验证是其中一种重要的方法。一个能够对片上系统(SOC)设计进行全面快速验证的测试系统将会大大提高协同设计的效率[2]。测试系统中不同平台之间数据和信号的发送与接收是系统中必不可少的组成部分。该文介绍了测试系统平台间通讯方式和通讯协议的设计与实现。Codesign with hardware and software is a parallel-design methodology,and it is divided into system description,hardware -software partition,implementation and co -verification 1 .Co -verification verifies hardware and software simultaneously,and processer emulator is an important direction for co-verification.A test platform that can support a general and quick verification for SOC will improve the efficiency of codesign greatly 2 .The communication of data and signals between the different platforms in test system is indispensable.The paper introduces the communication design,protocal and implementation detailedly.

关 键 词：软硬件协同设计 软硬件协同验证 通讯 并口 JTAG加载 SOC 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]