门阵列CAD软件的设计  

A Design of CAD Tools for Gate Array

作　　者：樊晓桠[1] 张朝杰 刘伟[1] 

机构地区：[1]西安西北工业大学计算机系

出　　处：《微电子学与计算机》1987年第6期24-26,共3页Microelectronics & Computer

摘　　要：一、前言应用门阵列是用户开发自己电路的良好方法之一。目前,门阵列的生产已走在应用的前面。骊山微电子公司已研制成CMOS 门阵列电路。由于门阵列的诸多优点,用它设计电路时CAD 要处理的信息量比一般的专用设计少得多,故在已大量普及了的微机系统上开发一套门阵列CAD 工具是很有价值的。经过在IBM/PC-XT 微机系统上作的初步尝试。This paper deals with the design of aCAD tools of gate array On IBM PC/XT.Theautliors fccused on implemen(?)ation of logicsimulation,placement and routing tecnniques.A critical time monitor approach was proposedin the logic simulation program.This programcan search for those unsatisfactory points ina circuit depending on a given critical timeIt had fast simulation speed.Based on makinga detailed analysis on the objective functionused in analytic algorithm,an improved place-ment algorithm was developed,It combined thefeatures of good global performance and highadaptability.A mixed global routing approachwas proposed to improve the global perfor-mance of the (?)outing.the approach of assig(?)-ment of logic channels to the signal nets wasdescribed as H-net.The issues of assignmentand overflow of physical channels were alsosolved satisfactorily.Fach of three programscan run in 60 K memory.Several examplesshowed that the performance was satisfactory

关 键 词：门阵列 骊山微电子公司 软件 布线算法 CAD 

分 类 号：G6[文化科学—教育学]