应用VHDL语言的FFT算法实现  

Adopting Very High Speed Integrated Circuit Hardware Description Language to Realize FFT

作　　者：任淑艳[1] 关丛荣[1] 杨永刚[1] 杨守成[1] 

机构地区：[1]哈尔滨理工大学机械动力工程学院,黑龙江哈尔滨150080

出　　处：《哈尔滨理工大学学报》2003年第6期24-26,共3页Journal of Harbin University of Science and Technology

摘　　要：针对目前数字信号处理中大量采用的FFT算法都需要软件来处理的问题,基于FFT算法的原理,采用硬件描述语言(VHDL)和现场可编程逻辑门阵列(FPGA),建立了算法逻辑的硬件模型,并编程实现其逻辑运算功能,完成了FFT算法的硬件描述.经测试表明,数字信号的处理速度提高了10％～20％,特别适用于复杂信号的频谱分析,增强了数据处理的可靠性和稳定性.At present, FFT arithmetic is widely applied in the disposal of the data signals, which is disposed by software. On the basis of FFT arithmetic, Very High Speed Integrated Circuit Hardware Description Language (VHDL) and Field Programmable Gate Array (FPGA) are adopted to build arithmetic model and realize the function. After running, what has been gained is high speed about 10% -20% in the disposal of the data signals, reliability and stability of data.

关 键 词：VHDL语言 FFT算法 数字信号处理 现场可编程逻辑门阵列 FPGA 快速FOURIER变换 

分 类 号：TN911.72[电子电信—通信与信息系统]