Static Induction Devices with Planar Type Buried Gate  

平面型埋栅结构的静电感应晶体管(英文)

作　　者：王永顺[1] 李思渊[1] 胡冬青[1] 

机构地区：[1]兰州大学物理科学与技术学院静电感应器件研究所,兰州730000

出　　处：《Journal of Semiconductors》2004年第2期126-132,共7页半导体学报（英文版）

摘　　要：Based on the surface-gate and buried-gate structures,a novel buried-gate structure called the planar type buried-gate (PTBG) structure for static induction devices (SIDs) is proposed.An approach to realize a buried-gate type static induction transistor by conventional planar process technology is presented.Using this structure,it is successfully avoided the second epitaxy with a high degree of difficulty and the complicated mesa process in conventional buried gate.The experimental results demonstrate that this structure is desirable for application in power SIDs.Its advantages are high breakdown voltage and blocking gain.在表面栅和埋栅结构的基础上 ,提出了一种制造静电感应晶体管的新型结构 ,平面型埋栅结构 .用普通的平面工艺实现了具有高击穿电压的埋栅结构 ,避免了工艺难度较大的二次外延和台面腐蚀工艺 .实验结果表明该结构可用于制造各种功率静电感应器件 ,其优点是具有高的击穿电压和高的阻断增益 ,并讨论了平面型埋栅结构的主要特点和制造工艺 .

关 键 词：static induction device planar type buried gate structure blocking voltage limiting field ring 

分 类 号：TN32[电子电信—物理电子学]