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出 处:《Journal of Semiconductors》2004年第4期372-376,共5页半导体学报(英文版)
基 金:国家自然科学基金资助项目 (批准号 :5 0 1770 2 7)~~
摘 要:An optimized design of the monolithic switched capacitor DC-DC converter is presented.The general topologic circuit and its basic operating principles are discussed theoretically.Circuit equivalent resistance regulation method is proposed as a feasible method to design the on-chip converters.N-channel MOSFETs,instead of Schottky diodes,are used as the diodes in the converters because of their processing compatibility in monolithic fabrication.One more manufacture step,however,is expected to adjust the threshold voltage of the MOSFETs for improving output characteristics of the converters.As an example,a step-up switched-capacitor converter is fabricated in a 2μm p-well double-poly single-metal CMOS technology with breakdown voltage of 15V.Test results indicate that a single sampling cell with 0.4mm 2 of die size can deliver energy up to 0.63mW at 5V output under the condition of 3V input.Efficiency of the tested sample is 68% at 9.8MHz switching frequency...提出了一种针对单片集成开关电容 DC- DC变换器进行优化的设计方案 .阐述了开关电容 DC- DC变换器电路的拓扑结构及其基本工作原理 ,给出了单片集成开关电容 DC- DC变换器的等效电阻控制方法 .考虑到集成工艺的兼容性问题 ,在电路设计时 ,用 n沟 MOSFET替代二极管 ;为了改善变换器的输出特性 ,在标准 2μm p阱双层多晶硅单层金属 CMOS工艺中增加了一次 MOSFET阈值电压的调整步骤 ,实现了升压开关电容 DC- DC变换器的单片集成 .芯片面积为 0 .4 mm2 ,测试结果显示 ,在变换器输入电压为 3V,输出电压为 5 V,电路开关频率为 9.8MHz时 ,输出功率为 0 .6 3m W,效率达到 6 8% .
关 键 词:switched-capacitor converter MONOLITHIC CMOS integrated circuit
分 类 号:TN792[电子电信—电路与系统]
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