PCI总线接口控制器的FPGA设计  

FPGA Design of PCI Bus Interface Controller

作　　者：王友波[1] 刘明业[1] 

机构地区：[1]北京理工大学信息科学技术学院计算机科学工程系,北京100081

出　　处：《北京理工大学学报》2004年第5期423-426,共4页Transactions of Beijing Institute of Technology

基　　金：国家部委基础科研项目(J1400B006)

摘　　要：研究有限状态机与PCI总线接口控制器的设计问题.在分析PCI总线接口控制器基本功能的基础上,给出其顶层设计.根据PCI总线操作时序,提出了从设备接口控制器的有限状态机模型.同时结合AlteraFLEX10K的FPGA器件,采用Verilog硬件描述语言,描述该总线控制器的基本操作,并完成功能仿真与综合,实现了PCI总线控制器的FPGA设计,说明该有限状态机具有结构清晰、易于维护的特点.Studies issues in the finite state machine (FSM) design in PCI bus interface controllers. The PCI top-level block design is first presented in terms of the bus interface controller. The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing. The basic operation of the bus controller is described with the Altera's FLEX10K FPGA device and Verilog HDL, along with the function simulation and synthesis and the FPGA design of the PCI bus controller. This brings out the strong points of the FSM, such as its clear structure and easy maintance.

关 键 词：PCI总线接口 有限状态机 FPGA设计 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]