一种低电压高精度125MHz采样/保持电路  

A Low-Voltage High-Resolution 125-MHz Sample and Hold Circuit

作　　者：王照钢[1] 陈诚[1] 任俊彦[1] 许俊[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海200433

出　　处：《微电子学》2004年第3期306-309,共4页Microelectronics

基　　金：国家863计划资助项目(2002AA1Z1360);上海市集成电路设计创新项目资助(027062005)

摘　　要：　介绍了一个低电压高精度的高速采样/保持电路。该电路的电源电压为1.8V,在125MHz频率时钟采样时,可达到10位以上的精度;采用栅源电压恒定的栅压自举开关,极大地减小了采样的非线性失真,同时,有效地抑制了输入信号的直流偏移;高性能增益自举的折叠式级联运算放大器减小了有限增益和不完全建立带来的误差。整个电路以0.18μmCMOS工艺库验证,功耗仅为11.2mW。A low-voltage high-resolution high-speed sample and hold circuit is presented, which achieves a resolution above 10-bit at a sampling rate of 125 MHz with 1.8 V supply voltage. Using switch gate voltage bootstrapping for constant V_(gs) and bottom plate sampling techniques, nonlinear distortion is reduced significantly and DC drift of the input signal is effectively rejected.A high-performance gain-boosted folded cascade operational amplifier reduces errors caused by finite gain and incomplete settling. The circuit, which consumes only 11.2 mW of power, is simulated with 0.18 μm CMOS process library.

关 键 词：运算放大器 采样/保持电路 自举 

分 类 号：TN722.7[电子电信—电路与系统] 7