一种单粒子软错误测试系统的硬件设计与实现  

Hardware Design and Implementation of Single Particle Soft Error Test System

作　　者：赖晓玲[1] 朱启[1] 王健[1] 黄小平[2] 吴昊[2] 郭阳明[2] 

机构地区：[1]中国空间技术研究院西安分院,陕西 西安 [2]西北工业大学计算机学院,陕西 西安

出　　处：《建模与仿真》2020年第3期293-302,共10页Modeling and Simulation

摘　　要：空间飞行器数字系统工作在含有大量辐射粒子的宇宙环境下,单粒子软错误会对飞行器的安全性、可靠性造成很大威胁,亟需建立单粒子软错误测试系统以完成对象数字系统的测试。论文以Xilinx公司的XC5VFX130T SRAM型FPGA和TI公司的TMS570LS3137型号CPU器件及其构建的数字系统为对象,分析了软错误测试系统的功能需求,提出了系统总体结构,进而定义功能、划分模块,设计了监控FPGA和上位机之间的通讯协议,从监控FPGA、被测FPGA和CPU,对硬件平台和系统逻辑进行了设计和实现。Thedigital system of space vehicle works in the space environment with a largenumber of radiation particles. Single particle soft error will pose a greatthreat to the safety and reliability of the vehicle. It is urgent toestablish a single particle soft error test system to complete the test of the object digital system. This paper takes XC5VFX130TSRAM FPGA of Xilinx company and TMS570LS3137 CPU of TI company and itsdigital system as objects, analyzes the functional requirements of the softwareerror test system, puts forward the overall structure of the system, definesthe functions, divides the modules, designs the communication protocol betweenthe monitoring FPGA and the upper computer, and realizes the hardware platformand the system logic with the aspects of monitoring FPGA, tested FPGA and CPU.

关 键 词：FPGA CPU 单粒子效应 单粒子软错误 测试系统 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]