BUFFERING

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I/O Acceleration via Multi-Tiered Data Buffering and Prefetching被引量：2
《Journal of Computer Science & Technology》2020年第1期92-120,共29页Anthony Kougkas Hariharan Devarajan Xian-He Sun 
This work is funded by the National Science Foundation of USA under Grants Nos.OCI-1835764 and CSR-1814872。
Modern High-Performance Computing(HPC)systems are adding extra layers to the memory and storage hierarchy,named deep memory and storage hierarchy(DMSH),to increase I/O performance.New hardware technologies,such as NVM...
关键词：I/O BUFFERING heterogeneous BUFFERING layered BUFFERING deep memory hierarchy BURST BUFFERS hierarchical data PREFETCHING DATA-CENTRIC architecture 
A Unified Buffering Management with Set Divisible Cache for PCM Main Memory
《Journal of Computer Science & Technology》2016年第1期137-146,共10页Mei-Ying Bian Su-Kyung Yoon Jeong-Geun Kim Sangjae Nam Shin-Dug Kim 
This research proposes a phase-change memory （PCM） based main memory system with an effective combi- nation of a superblock-based adaptive buffering structure and its associated set divisible last-level cache （LLC...
关键词：memory hierarchy memory structure cache memory buffer management 
Efficient Handling of Lock Hand-off in DSM Multiprocessors with Buffering Coherence Controllers被引量：1
《Journal of Computer Science & Technology》2012年第1期75-91,共17页Benjamín Sahelices Agustín de Dios Pablo Ibáez Víctor Vials-Yúfera José María Llabería 
supported in part by Spanish Government and European ERDF under Grant Nos. TIN2007-66423, TIN2010-21291-C02-01 and TIN2007-60625;gaZ:T48 research group (Arag'on Government and European ESF);Consolider CSD2007-00050 (Spanish Government);HiPEAC-2 NoE (European FP7/ICT 217068)
Synchronization in parallel programs is a major performance bottleneck in multiprocessor systems. Shared data is protected by locks and a lot of time is spent on the competition arising at the lock hand-off. In order ...
关键词：distributed shared memory multiprocessors synchronization buffer coherence controller request bypass 
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