VLSI设计规划中互连串扰的峰值估计  

Estimation of Crosstalk Peak for VLSI Synthesis and Design Planning

作　　者：翁健杰[1] 刘凌志[1] 戎蒙恬[1] 毛军发[1] 

机构地区：[1]上海交通大学电子工程系,上海200030

出　　处：《微电子学》2002年第6期409-411,415,共4页Microelectronics

基　　金：国家"八六三"高技术研究发展计划资助项目(863-SOC-Y-3-3-2)

摘　　要：　提出了一组新的基于RLC模型的VLSI互连串扰峰值估计公式。根据高速VLSI互连特性建立了混πRLC模型,推导出分量匹配法3阶系数的精确表达式,得到了只与R、L、C分布参数有关的互连线串扰峰值估计公式。计算实验表明,该公式与SPICE仿真结果符合得较好。将该估计公式嵌入各种综合引擎和工具,能够在高速、高密度、大规模集成电路的设计阶段预测信号性能。A new set of formulas for estimation of crosstalk peak in VLSI interconnects is presented in the paper, which is based on the RLC model Considering the highspeed interconnect features of VLSI, a π circuit model was built, and an accurate 3rdorder coefficient formula for moment matching method was derived Finally, a set of formulas for estimation of crosstalk peak is presented, which only bears relation to the distributed parameters of R, L and C Calculation and experiment show that the formulas are in good agreement with the results from SPICE simulation The new formulas can be easily integrated into CAD analysis tools for predicting the signal integrity in designing highspeed and highdensity VLSI circuits

关 键 词：VLSI 互连 串扰 RLC电路模型 分量匹配法 

分 类 号：TN47[电子电信—微电子学与固体电子学]