一种新型凹源HV-NMOS器件研究  

Research on Novel High Voltage NMOS with Recessed Source

作　　者：孙伟锋[1] 易扬波[1] 吴烜[1] 王平[1] 吴建辉[1] 

机构地区：[1]东南大学国家ASIC系统工程技术研究中心,南京,210096

出　　处：《固体电子学研究与进展》2004年第3期286-290,共5页Research & Progress of SSE

基　　金：国家"8 6 3"超大规模集成电路专项资助课题 ( No.2 0 0 2 AA1 Z1 5 5 0

摘　　要：设计出一种能与体硅标准低压 CMOS工艺完全兼容的新型凹源 HV-NMOS( High voltage NMOS)结构 ,在 TSUPREM-4工艺模拟的基础上提出了该结构具体的工艺流程及最佳的工艺参数 ,通过 MEDICI进行特性模拟得到了该结构的电流 -电压和击穿等特性曲线 ,击穿电压比传统 HV-NMOS提高了 3 7.5 %。同时分析了凹源结构、p阱、缓冲层 ( Buffer层 )及场极板对改善 HV-NMOS工作特性的有效作用 ,最后给出了该凹源 HV-NMOS的流水实验测试结果。A novel High Voltage NMOS (HV-NMOS) with recessed source compatible with bulk CMOS process has been designed. An idiographic process and the most conformable parameters for the proposed HV-NMOS are given with the simulation results of TSUPREM-4. The characteristic on I-V and breakdown is simulated with MEDICI, the breakdown voltage of the proposed HV-NMOS is increased by 37.5% compared with the conventional HV-NMOS. At the same time the functions to improving characteristic are analyzed according to the recessed source, p well, buffer and field plate. Finally, the experiment result of proposed HV-NMOS is presented.

关 键 词：高压N型金属-氧化物-半导体 凹源 缓冲区 场极板 击穿电压 

分 类 号：TN710[电子电信—电路与系统] TN432