超深亚微米自对准平面双栅MOSFET假栅的制作  

Fabrication of Ultra Deep Submicron Replaced Gate for Self-Aligned Planar Double-Gate MOSFET's

作　　者：王志玮[1] 徐秋霞[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《微电子学》2005年第1期93-96,99,共5页Microelectronics

基　　金：自然科学基金资助项目(60276022)

摘　　要：进入超深亚微米领域以后,传统CMOS器件遇到了器件物理、工艺技术等方面难以逾越 的障碍。普遍认为,必须引入新结构和新材料来延长摩尔定律的寿命。其中,双栅CMOS被认为是 新结构中的首选。在制作平面型双栅MOS器件中,采用自对准假栅结构,利用UHV外延得到有源 区(S、D、G),是一种制作自对准双栅MOSFET的有效手段。文章详细研究了一种假栅制作技术。 采用电子束曝光,结合胶的灰化技术,得到了线宽为50 nm的胶图形,并用RIE刻蚀五层介质的方 法,得到了栅长仅为50 nm的自对准假栅结构。When scaled down to the ultra deep sub-micron field, the traditional CMOS device encounters serious challenges in device physics and fabrication technologies. It is generally agreed that new device structure and new materials have to be introduced to extend the Moor's law. Double-gate CMOS is considered the first choice among new device structures. An effective way to fabricate self-aligned double-gate MOSFET's is to prepare a replaced gate structure and make the active area (S,D,G) using UHV epitaxy. A method to fabricate the replaced gate structure is discussed in the paper. Using e-beam and resist ashing, resist patterns with 50 nm line-width are obtained, and a self-aligned replaced gate structure with 50 nm gate-length is fabricated by etching 5 layers of dielectrics with RIE.

关 键 词：双栅MOSFET 自对准 亚微米工艺 假栅 

分 类 号：TN305.7[电子电信—物理电子学]