多芯片组件高速电路布局布线设计及信号传输特性仿真  

Design and transmission characteristics simulation in MCM placement and routing

作　　者：畅艺峰[1] 杨银堂[1] 柴常春[1] 

机构地区：[1]西安电子科技大学宽禁带半导体材料与器件教育部重点实验室,陕西西安710071

出　　处：《西安电子科技大学学报》2005年第1期44-47,共4页Journal of Xidian University

基　　金：国家部委预研资助项目

摘　　要：以检测器电路为例,利用APD(AdvancedPackageDesigner)软件实现了电路的多芯片组件布局布线设计.结合信号在时域和频域的反射、延时和电磁干扰分析结果,对电路布局布线结构进行了反复调整.采用50MHz脉冲信号触发,噪声裕量增大了124 86mV;上、下过冲分别减小了180.61mV,465 36mV;传输延时、开关延时和信号建立时间分别缩短了0 407835ns,0 4188ns,0.35968ns,同时输入信号的相对延时不超过0 2ns,电磁干扰强度也减小了10%以上.仿真结果表明经调整和改进后的电路布局和布线设计可以满足信号传输的要求.In the high speed multichip module (MCM) design, signal integrity is pivotal. By means of a real faultdetector example, the paper gives an improved method for MCM placement and routing. The analysis results of signal characteristics, such as reflection, delay and electromagnetic interference, in both time domain and frequency domain, are discussed to optimize the circuit structure in the design process. Here we adopt 50 MHz pulse signal as the trigger and utilize Spectra Quest software as the simulation tool. The simulation results show that the noise margin is up 124.86 mV; the high overshoot and low down 180.61 mV, 465.36 mV respectively; the propagation delay, switch delay and settle delay down 0.407835 ns, 0.4188 ns, 0.35968 ns respectively; the relative delay of input signals is not longer than 0.2 ns and the intensity of electromagnetic interference is decreased 10% and above. The results above indicate that the adjusted and optimized placement and routing design can meet the signal transmission requirements.

关 键 词：多芯片组件 布局布线 电磁干扰 

分 类 号：TN405.97[电子电信—微电子学与固体电子学]