延迟锁定环(DLL)及其应用  

Delay-locked Loop and It's Applications

作　　者：陆平[1] 郑增钰[1] 任俊彦[1] 

机构地区：[1]复旦大学专用集成电路与系统国家重点实验室,上海200433

出　　处：《固体电子学研究与进展》2005年第1期81-88,共8页Research & Progress of SSE

摘　　要：DLL可以产生精确的延迟效果而不受环境和工艺条件的影响 ,因而常用来生成稳定的延迟或多相位的时钟信号。文中介绍了延迟锁相环的结构 ,设计了 CMOS工艺 DLL具体电路 ,着重分析了新型的伪差分结构延迟单元 ,它可使设计简单而且单位延迟时间的选择更加灵活。文中还对 DLL在高速以太网发送电路中的应用作了具体的设计和仿真 ,运用 DLL使发送数据的上升、下降时间精确地控制在 4ns± 1DLL may generate an accurate delay which is rarely affect ed by circumstance and process condition s, so it is used to generate stable dela y or multi-phase clocks. The structure o f DLL is introduced and the CMOS circuit of DLL is designed too. The new fake di fferential delay cell is emphasized beca use it can simplify the circuit and make it choose delay time more flexibly. The DLL applied to high-speed Ethernet tran smitter is designed and simulated by Spi ce. DLL can control the rise and fall ti me of data transmitted within 4 ns±1 ns. The simulation is done with 0.35 micron standard CMOS process technology and 3. 3 V power supply.

关 键 词：锁相环 延迟锁定环 鉴相器 电荷泵 压控延迟线 

分 类 号：TN4[电子电信—微电子学与固体电子学]