一种基于反射内存实时网络的半实物仿真系统  

A Hardware-in-the-loop Simulation System Based on Reflective Memory Real-time Network

作　　者：高立娥[1] 康凤举[1] 王彦恺[1] 

机构地区：[1]西北工业大学航海工程学院,陕西西安710072

出　　处：《计算机仿真》2005年第3期29-32,共4页Computer Simulation

摘　　要：半实物仿真是样机研制过程中的一个重要环节,实时算法和通讯技术是半实物仿真系统的关键技术。该文首先介绍了VMIC反射内存实时网络的特点,然后详细介绍了基于反射内存实时网络半实物仿真系统的软硬件组成、功能,以及水下航行器控制系统半实物仿真的系统结构,最后给出了半实物仿真结果。仿真结果表明,采用实时网络的半实物仿真系统,大大地提高了仿真帧频,减小了多种仿真设备信息传输中的信号干扰。基于反射内存实时网络的半实物仿真系统,具有模块化结构的特点,配置灵活,便于扩充、升级和软件移植。The hardware-in-the-loop simulation plays a very important role in prototype design. Both the real-time algorithm and communication are the key techniques in the hardware-in-the-loop simulation. This paper firstly introduces the features of reflective memory real-time network of VMIC. The architectures and functions of the real-time network are described, and the configuration for underwater vehicles control system simulation is presented in details. Finally, the simulation results are given. The results show that this system can enhance the simulation frame time and reduce the influences that exist in the signal transmission process. The hardware-in-the-loop simulation system based on reflective memory is a modular structure. The configuration is flexible, so the system is easy to be expanded, updated and migrated.

关 键 词：水下航行器 控制系统 半实物仿真 实时网络 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]