一种减少嵌入式处理器功耗的综合DVS方法  

A Combined DVS Method of Decreasing Power Consumption of the Embeded Microprocessor

作　　者：杨雪金[1] 南余荣[1] 俞立[1] 

机构地区：[1]浙江工业大学信息工程学院,杭州310014

出　　处：《计算机工程与应用》2005年第14期113-114,167,共3页Computer Engineering and Applications

基　　金：国家自然科学基金项目(编号:60274034)

摘　　要：对于使用电池作为供电电源的嵌入式设备而言,如何降低功耗已经成为设计中一个非常重要的方面。嵌入式处理器的功耗可以分为确定性功耗和非确定性功耗。目前很多的研究还都只是集中在如何减少确定性功耗这个方面,但随着芯片体积的不断缩小,非确定性功耗变得越来越突出,该文综合考虑这两方面提出了一种综合的DVS方法,并对此方法进行了分析。For the embedded equipments which use the battery as the supply power,one critical aspect is how to decrease the power consumption.The power consumption of embedded microprocessor has both certain power consumption and uncertain power consumption.Now many studies about it focus on how to decrease the certain power consumption.However,with the size of microprocessor shrinking,the uncertain power consumption is becoming more and more prominent.Based on these factors,a combined DVS method is presented and analyzed in this paper.

关 键 词：DVS 确定性功耗 非确定功耗 

分 类 号：TP36[自动化与计算机技术—计算机系统结构]