基于VHDL的Viterbi译码器的实现  

Implementation of Viterbi encoder based on VHDL

作　　者：陈朝晖[1] 孙延鹏[1] 

机构地区：[1]沈阳航空工业学院电子工程系,辽宁沈阳110034

出　　处：《沈阳航空工业学院学报》2005年第2期49-51,共3页Journal of Shenyang Institute of Aeronautical Engineering

摘　　要：介绍了一种运用VHDL来实现维特比(Viterbi)译码器的方法。详细描述了维特比译码器的优化算法和用VHDL语言实现原理。电路在集成开发环境MAX+PLUSII下可以完成设计、仿真、适配并下载。文中给出了维特比译码器顶层设计电路图,以及电路的主要模块和总体电路的仿真结果。其仿真结果表明,用VHDL实现维特比译码器是一种快速有效的方法。This paper introduced a method which can realize Viterbi encoder based on VHDL. It described the optimum arithmetic of Viterbi encoder and the principle of Viterbi encoder realized by VHDL language. We can design, simu1ate, match and load in MAX+PLUS II integrate exploitation surroundings. This paper presented the top-design circuit of Viterbi encoder . It also presented the simulation results of Viterbi encoder ’s of main parts and the whole circuit. The results showed that the realization of Viterbi encoder based on VHDL is a fast and effective method.

关 键 词：VHDL 维特比 译码器 

分 类 号：TN764[电子电信—电路与系统]