基于VHDL的半整数分频器的设计  

The Design of the Half Integer Frequency Divider base on VHDL

作　　者：林海波[1] 

机构地区：[1]长春工程学院信息工程系,吉林长春130021

出　　处：《电子与封装》2005年第9期38-40,33,共4页Electronics & Packaging

摘　　要：本文介绍了VHDL语言的产生、特点和程序设计的基本语法结构。并以分频比为2.5的半整数分频器的设计为例,介绍了在MAX+plusⅡ开发软件下,利用VHDL硬件描述语言设计数字逻辑电路的过程和方法。The paper introduces the giving rise to and characteristic and the basic grammar structure of programming of VHDL language.With the design of the half integer frequency divider of the division frequency rate 2.5 serve as the example, course and the method of numeral logical circuit designed under MAX＋plus Ⅱ development software are introduced , by using VHDL hardware description language.

关 键 词：VHDL CPLD/FPGA 数字逻辑电路设计 半整数分频器 

分 类 号：TP313[自动化与计算机技术—计算机软件与理论]