薄外延阶梯掺杂漂移区RESURF耐压模型  

A Breakdown Model of Thin Epitaxial RESURF Device with Step Doping Profile Drift

作　　者：李琦[1] 李肇基[1] 张波 

机构地区：[1]电子科技大学IC设计中心,成都610054

出　　处：《固体电子学研究与进展》2006年第1期1-5,共5页Research & Progress of SSE

摘　　要：提出薄外延阶梯掺杂漂移区RESURF结构的耐压解析模型。借助求解二维Po isson方程,获得薄外延阶梯掺杂漂移区的二维表面电场和击穿电压的解析表达式。基于此耐压模型研究了不同阶梯漂移区数(n=1、2、3、5)的击穿特性,计算了击穿电压与结构参数的关系,其解析结果与数值结果吻合较好。在相同长度下,阶梯掺杂漂移区结构(n=3)击穿电压由均匀漂移区(n=1)的200 V提高到250 V,增加25%。该模型可用于薄外延阶梯掺杂和线性掺杂漂移区RESURF器件的设计优化。An analytical breakdown model for thin epitaxial RESURF device with step doping profile drift is presented in this paper. Based on the 2-D Poisson equation,the derived model gives the solutions of the surface field distributions breakdown characteristics are researched for the and breakdown voltage. Based on this model structure with different step number n, and the influence of all design parameters on breakdown voltage is calculated. All analytical results are well verified by the numerical analysis obtained by the semiconductor device simulator MEDICI. The breakdown voltage of the step drift profile structure （n=3） increases by a factor 1.25 from 200 V to 250 V compared with the conventional RESURF device （n = 1）. This analysis model is available for the design of step drift doping profile RESURF device and linearly-graded drift RESURF device.

关 键 词：薄外延 阶梯掺杂 降低表面电场 击穿电压 解析模型 

分 类 号：TN432[电子电信—微电子学与固体电子学]