功率集成电路中一种抗闩锁方法研究  

Research on a Method of Latch up Immunity in Power IC

作　　者：宋慧滨[1] 唐晨[1] 易扬波[1] 孙伟锋[1] 

机构地区：[1]东南大学国家ASIC系统工程技术研究中心,南京210096

出　　处：《半导体技术》2006年第6期429-431,440,共4页Semiconductor Technology

基　　金：国家高技术研究发展计划(863)资助项目(2004AA1Z1060)

摘　　要：在分析功率集成电路中闩锁效应的基础上,采取一种抗闩锁方法,即在高低压之间做一道接地的少子保护环。通过对环的电位、位置和宽度的研究,利用软件工具Tsuprem4和Medici进行模拟比较,并应用于实际版图中进行流片。这种保护结构可以将闩锁的触发电压提高一个数量级,在实际的闩锁静态测试中得到验证。Based on the analyzing of latch up issues in Power IC, a way was used to improve latch up immunity, that is a minority carrier guarding which connects to GND between high voltage device and low voltage device. With the research of the voltage, location and width of the guarding, the result is compared by the software Tsuprem4 and Medici, at the same time the structure is applied for the layout. The triggering voltage can be improved by up to one order of magnitude. This conclusion is proved in practical static latch up test.

关 键 词：功率集成电路 寄生双极型晶体管 少子保护环 闩锁 

分 类 号：TN43[电子电信—微电子学与固体电子学]