嵌入式软件模拟测试平台的设计与实现技术  

Design and Development Technology of Embedded Software Simulation Test Platform

作　　者：王海晟[1] 楼文晓 

机构地区：[1]西安理工大学计算机学院,西安710048 [2]西安软件工程技术研究中心,西安710075

出　　处：《计算机工程》2006年第15期247-249,共3页Computer Engineering

基　　金：国家"863"计划基金资助项目(2004AA1Z2410)

摘　　要：总结了嵌入式软件模拟测试平台研制过程中所遇到的技术难点和相应的解决途径。该平台主要包括静态分析和动态模拟运行两个子系统,静态分析部分拥有逆向生成程序流程图的功能。介绍了生成“流程图图块文件”的思想。CPU模拟是该平台的核心,给出了CPU模拟的工作方式和流程,以及测试覆盖率的统计方案。采用了两种存储器体系结构,寻址方式的模拟不仅保证了正确地确定操作数,而且能够正确统计指令执行时间。介绍了模拟时钟的设计思想,以及中断控制模拟器的工作原理,描述了中断信号的发生、中断优先级的控制措施。The paper is a technique summary about the key technique and the approach to overcome the difficulty, during development embedded software simulation test platform. The test platform consists of two subsystem： static analysis and dynamic execution. The function of creating flowchart from program is praised by users. An idea is described about making ＂flowchart chart block file＂. The CPU simulation is the kernel of the platform. A work mode and flow is described to simulate CPU. It presents test coverage statistic method. The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated. The design of clock simulation is described. It presents how to use simulation clock as pacesetter to control computer system and the work principle of the interrupt simulation, describes control measure about interrupt signal taking place and interrupt priority control.

关 键 词：嵌入式软件 模拟测试 ARM 中断 时钟周期 

分 类 号：TP311.5[自动化与计算机技术—计算机软件与理论]