数字IP芯核的多特征比较内建自测试方法(英文)  

Built-In-Self-Test Based on Multiple Signature Comparison for Digital IP Cores

作　　者：谢永乐[1] 王玉文[1] 陈光 

机构地区：[1]电子科技大学自动化工程学院,四川成都610054

出　　处：《四川大学学报（工程科学版）》2006年第6期153-158,共6页Journal of Sichuan University (Engineering Science Edition)

基　　金：国家自然科学基金资助项目(90407007)

摘　　要：由于不确知那些不属于IP芯核测试集的测试矢量的无故障响应,造成在伪随机测试下测试者无法获取被测IP芯核的无故障特征,上述事实构成了测试数字IP芯核的挑战之一。基于多特征检验原理,研究了适用于数字IP芯核的内建自测试(B IST)实现方法———MSCB IST。分析了多特征比较的故障混叠概率,并给出了其近似值。通过执行芯片上的多特征检查,显著降低了故障的潜隐性。MSCB IST无需存储多个无故障特征,支持并行的测试和特征检查,可以显著减少功能测试中的测试时间和降低故障混叠的概率。MSCB IST既可以用于确定性测试,也可以用于伪随机测试。Due to the unavailability of fauh-free test response corresponding to test pattern which does not belong to test set of IP core, the fault-free signature of Intellectual Property （IP） cores under pseudorandom test is unknown to test developers. Such circumstance poses one of test challenges to IP cores. MSCBIST, one hardware implementation methodology of Built-In-Self-Test （BIST） applicable to digital IP cores was studied based on the principle of multiple signature checking. Fault aliasing probability of multiple signature comparison was analyzed and its approximate value was estimated. By performing on-chip multiple intermediate signature checking, detection latency is decreased significantly. MSCBIST supports parallel signature check without storing multiple fault-free signature on a chip and allows testing and signature comparison to occur concurrently. It was showed that such a test method gives rise to significant improvements in test application time and aliasing probability during functional testing. MSCBIST is applicable both to deterministic test and to pseudorandom test of digital IP cores.

关 键 词：IP芯核 内建自测试 伪随机测试 测试响应压缩 

分 类 号：TN47[电子电信—微电子学与固体电子学]