CMOS工艺片上传输线研究  

Design of on-chip transmission line in CMOS process

作　　者：陈勖[1] 王志功[1] 李智群[1] 

机构地区：[1]东南大学射频与光电集成电路研究所,南京210096

出　　处：《东南大学学报（自然科学版）》2006年第6期892-896,共5页Journal of Southeast University：Natural Science Edition

摘　　要：对深亚微米硅基CMOS工艺集成电路中常用的微带线和共面波导2种传输线结构进行了研究．从理论上分析了传输线分布参数和损耗，利用0．13μm CMOS工艺制作了特征阻抗分别为50和70Ω的微带线和共面波导元件库，在0．1—30 GHz频率范围内利用网络分析仪和SOLT测试技术进行测试．利用分布参数电路模型和测试得到的S参数提取出了特征阻抗、衰减常数、品质因数等传输线基本参数．研究结果为设计者选择和设计高性能传输线提供出可借鉴的实用性模型．The characteristics of most commonly used transmission lines in deep submicron CMOS ICs, micro-strip and coplanar waveguide, were studied. The property and the calculation of the distributed parameters and loss of the transmission lines were analyzed theoretically. The micro-strip and coplanar waveguide libraries with the Z0 equal to 50Ω and 70 Ω were designed and fabricated in 0. 13 μm CMOS process, and were measured in the frequency range of 0. 1 -30 GHz using a vectornetwork analyzer. The SOLT （short-open-load-thru） de-embedding technique was utilized. Important parameters of the transmission lines, such as characteristic impedance, attenuation constant, and quality factor were extracted from the measured S-parameters based on circuit models. The results indicate that the lossy substrate has a serious effect to transmission line. This work provides a reasonable way to design and choose the transmission line structures.

关 键 词：CMOS工艺 微带线 共面波导 分布参数模型 

分 类 号：TB971[一般工业技术—计量学] TB973[机械工程—测试计量技术及仪器]