基于ATPG的无线接入芯片的可测试性设计  

Testability Design of Wireless Chip Based on ATPG

作　　者：郭慧晶[1] 苏志雄[1] 周剑扬[1] 

机构地区：[1]厦门大学信息科学与技术学院,福建厦门361005

出　　处：《现代电子技术》2006年第24期117-119,122,共4页Modern Electronics Technique

摘　　要：可测试性设计是现代芯片设计中的关键环节,针对无线接入芯片的可测试性设计对测试技术有更高的要求。首先概述可测试性设计和测试向量自动生成理论,然后采用最新的测试向量自动生成技术,根据自行设计的无线接入芯片的内部结构及特点,建立一套无线接入芯片可测试性设计的方案。同时功能测试向量的配合使用,使得设计更为可靠。最终以最简单灵活的方法实现了该芯片的可测试性设计。Design for test is an important process in the chip design nowadays,testability design of wireless chip needs a much higher requirement of test technology. Design for test and automatic test - pattern generation technology is first introduced in this paper,then based on the internal structure and character of wireless chip, the advanced automatic test - pattern generation technology is used in the design to build a scheme of testability chip. Functional test - pattern is used simultaneity to make the design more available. Finally,the most simply and agilely method is used to implement the design.

关 键 词：DFT 扫描链 ATPG stuck—at 

分 类 号：TP274.5[自动化与计算机技术—检测技术与自动化装置]