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出 处:《电子器件》1996年第4期239-251,共13页Chinese Journal of Electron Devices
摘 要:本文描述了一种实现亚100nm基区宽度的晶体管结构。加工工艺类似BSA(硼硅玻璃自对准)技术,可实现亚100nm的基区结深,还可解决自对准器件在横向和纵向按比例缩小时所遇到的困难。与离子注入工艺相比,这种工艺可轻易地解决诸如高剂量离子注入所产生的下列问题:二次沟道效应对基区结深减小的限制及晶格损伤。晶体管采用了多晶硅发射极,RTA(快速热退火)用于形成晶体管的单晶发射区,为提高多晶发射区的杂质浓度,采用了一种新的命名为低温氧化技术的工艺。由于晶体管采用了常规结构,器件暴露一些缺点。A structure of a sub-100 nm base width silicon transistor has been described in this paper. The method is similar to the BSA BSG Self-Aligned technology and makes it possible to realize the silicon transistor having sub-100 nm deep base…collaction junction and to solve the problems in lateral and vertical scalling downing of self-aligned transistors. Comparing with the conventional implantation technology, the problems such as the limitation of the reduction of the base junction depth due to the secondary channeling and the lattice defects formed by high dose implantation, can be easily solved. Polysilicon emitter was also used in this transistor. RTA Rapid Thermal Annealing was performed to form the crystal silicon emitter. An new process named low temperature oxiding technology has been used to increase the dopping cnocentration of the polysilicon emitter. As a normal structure has been used in this transistor, some deffects were found which can be easily solved nly by the use of the structure of self-aligned.
分 类 号:TN322.8[电子电信—物理电子学]
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