全耗尽异质栅单Halo SOI MOSFET二维模型  

Two-Dimensional Model of Fully Depleted Dual-Material-Gate Single-Halo SOI MOSFET

作　　者：李尊朝[1] 蒋耀林[1] 吴建民[1] 

机构地区：[1]西安交通大学电子与信息工程学院,陕西西安710049

出　　处：《电子学报》2007年第2期212-215,共4页Acta Electronica Sinica

基　　金：国家自然科学基金(No.NSFC60472003);国家重点基础研究发展计划项目(No.2005CB321701)

摘　　要：为了抑制深亚微米SOI MOSFET的短沟道效应,并提高电流驱动能力,提出了异质栅单Halo SOI MOS-FET器件结构,其栅极由具有不同功函数的两种材料拼接而成,并在沟道源端一侧引入Halo技术.采用分区的抛物线电势近似法和通用边界条件求解二维Poisson方程,为新结构器件建立了全耗尽条件下的表面势及阈值电压二维解析模型.对新结构器件与常规SOI MOSFET性能进行了对比研究.结果表明,新结构器件能有效抑制阈值电压漂移、热载流子效应和漏致势垒降低效应,并显著提高载流子通过沟道的输运速度.解析模型与器件数值模拟软件MEDICI所得结果高度吻合.A dual-material-gate single-halo SOI MOSFET was proposed to suppress the short channel effect and increase the current driving capacity of deep submicron SOl MOSFETs. The gate consists of two materials contacting laterally and with different work functions,and halo doping is used in the channel near the source. Using the multi-region parabola potential distribution and the universal boundary conditions,the two-dimensional analytical models of surface potential and threshold voltage for the novel device were derived by solving the two-dimensional Poisson＇ s equation under the fully depleted condition. The characteristics of the novel device were studied as compared with the conventional SOI MOSFET. It was shown that the novel device could suppress threshold voltage roll-off, hot carrier and drain-induced barrier lowering effects efficiently, and increase carrier transport speed through the channel considerably. The analytical models are in very good agreement with two-dimensional device simulator MEDICI.

关 键 词：MOSFET 异质栅 解析模型 阈值电压 

分 类 号：TN386[电子电信—物理电子学]