一种混合信号集成电路衬底耦合噪声分析方法  

An Analyzing Methodology for Substrate Coupling Noise in Mixed-Signal Integrated Circuits

作　　者：朱樟明[1] 杨银堂[1] 刘帘曦[1] 吴晓鹏[1] 

机构地区：[1]西安电子科技大学微电子研究所,西安710071

出　　处：《固体电子学研究与进展》2007年第1期69-73,共5页Research & Progress of SSE

基　　金：国家自然科学基金(60476046);国家级重点实验室基金(51433030103DZ0101);教育部博士点基金(20050701015);国家部委基金(51408010304DZ0140;51408010205DZ0164)资助项目

摘　　要：讨论分析了混合信号集成电路衬底噪声耦合的机理,及对模拟电路性能的影响。提出了一种混合信号集成电路衬底耦合噪声分析方法,基于TSMC 0.35μm 2P4M CMOS工艺,以14位高速电流舵D/A转换器为例,给出了混合信号集成电路衬底耦合噪声分析方法的仿真结果,并与实际测试结果进行比较,证实了分析方法的可信性。Based on the analysis of substrate noise generated by digital circuits, the effects of substrate noise on analog circuits in a mixed-signal chip are described and analyzed. A methodology to accurately and efficiently analyze the substrate noise coupling is presented. Based on the TSMC 0. 35 μm 2P4M CMOS process, the effects of substrate noise on 14-bit high-speed currentsteering D/A converter are studied through the comparing the test frequency results and simulated frequency. The proposed methodology for substrate noise analysis has been verified.

关 键 词：衬底噪声 混合信号 模型 互补金属氧化物半导体 

分 类 号：TN402[电子电信—微电子学与固体电子学]