0.8μm PDSOI CMOS器件和环振电路研究  

Study on 0.8μm PDSOI CMOS Devices and Ring Oscillators

作　　者：毕津顺[1] 海潮和[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《半导体技术》2007年第6期490-493,共4页Semiconductor Technology

摘　　要：研究了0.8μm部分耗尽绝缘体上硅(PDSOI)CMOS器件和电路,开发出成套的0.8μmPDSOI CMOS工艺。经过工艺投片,获得了性能良好的器件和电路。其中,当工作电压为5 V时,基于浮体SOI CMOS技术的0.8μm101级环振单级延时为49.5 ps;基于H型栅体引出SOI CMOS技术的0.8μm101级环振单级延时为158 ps。同时,对PDSOI CMOS器件的特性,如浮体效应、背栅特性、反常亚阈值斜率、击穿特性和输出电导变化等进行了讨论。The partially depleted SOI CMOS devices and circuits with channel length of 0.8 μm were studied and the 0.8μm PDSOI CMOS technology was developed as well. Devices and circuits with good performance were obtained. Under 5 V supply voltage, the per-stage propagation delays of 101-stage 0.8μm PDSOI CMOS ring oscillators based on floating body scheme and H-gate body contacted scheme were 49.5 ps and 158 ps, respectively. Some characteristics of the PDSOI CMOS devices were also discussed, such as floating body effect, back gate characteristics, abnormal subthreshold slope, off-state breakdown characteristics and Output conductance variation.

关 键 词：部分耗尽绝缘体上硅 CMOS器件 环振电路 

分 类 号：TN386[电子电信—物理电子学]