边界扫描技术在板级可测性设计中的应用  

Application of boundary scan technique in design of board-level test

作　　者：周杰[1] 周绍磊[1] 彭贤[1] 雷鸣[1] 

机构地区：[1]海军航空工程学院控制工程系,山东烟台264001

出　　处：《中国测试技术》2007年第4期77-80,共4页CHINA MEASUREMENT & TESTING TECHNOLOGY

摘　　要：硬件系统的规模越来越大,复杂程度越来越高,对其进行测试也越来越困难,边界扫描技术很好地解决了传统测试的不足。阐述了JTAG技术的基本原理,从设计方法、优化策略及实现技术等方面,对基于JTAG的PCB可测性设计进行了研究,给出了具体的实现方法,并实现了自动测试系统中数据采集电路板的可测性设计。结果证明该方法有效缩短了测试时间,降低了维修测试费用,具有较大的实用价值。As the scale and complexity of hardware systems increase quickly, test becomes a difficult task. The BST technique can well make up the shortcoming of traditional test techniques. This article presented the basic principle of JTAG technique. The design for test of PCB based on JTAG was researched from designed method, optimization strategy, realization technique and so on. Some concrete implementing methods were given and the realization of the measurability design of the data collection circuit beard of an automatic test system was also presented. The result shews that, by using this method, th time of test can be effectively shortened and the cost of maintenance and test can be reduced.

关 键 词：电路板 边界扫描 板级测试 可测性设计 JTAG 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]