IP复用的FSPLC微处理器SOC设计  

Design of FSPLC Microprocessor based on IP Resume

作　　者：冉峰[1] 李润光[1] 徐美华[2] 康志英[3] 

机构地区：[1]上海大学微电子中心,上海200072 [2]上海大学机电工程与自动化学院,上海200072 [3]1上海大学微电子中心,上海200072

出　　处：《微电子学与计算机》2007年第11期110-113,共4页Microelectronics & Computer

摘　　要：设计了一种专用PLC微处理器SOC模块FSPLC,基于IP核复用方法和SOC技术复用第三方AVRAT90S1200IP核基础上集成了自行设计的LP、BP、MBI、CBI、BBI等模块,以AlteraNiosII开发板作为验证平台对实际的PLC应用程序做了可行性验证,FSPLC具有快速处理PLC梯形图程序、快速处理指令表语句中复杂的嵌套逻辑运算、PLC之间CAN总线通讯等优点。The paper designs the special PLC microprocessor SOC module FSPLC,integrated such the modules as LP , BP, MBI , CBI, BBI designed by oneself ,etc. on the basis of resuming the third-party AVR AT90S1200 IP core. The Ahera NiosII development board is taken as the verification flafform to make feasible verification for the actual PLC application program, FSPLC can rapidly deal with the PLC LD program and the complicated nested logic operation, carry out CAN bus communication among the PLCs and so on.

关 键 词：AVR SOC FSPLC LP IP核复用 微处理器 

分 类 号：TN47[电子电信—微电子学与固体电子学]