主成分分析算法的FPGA实现  

Implementation in FPGAs of principal component analysis

作　　者：侯咏佳[1] 方东博[1] 袁生光[1] 沈海斌[1] 

机构地区：[1]浙江大学超大规模集成电路设计研究所,浙江杭州310027

出　　处：《机电工程》2008年第9期37-40,共4页Journal of Mechanical & Electrical Engineering

摘　　要：主成分分析(PAC)是一种典型的数据降维方法,它通过对数据矩阵的特征分析,将高维数据降为低维数据,而且转换后数据包含的信息损失很小。提出了一种主成分分析算法的FPGA实现方案,通过Givens算法和CORDIC算法的矢量旋转,用简单的移位和加法操作来实现协方差矩阵的特征分析,只需计算上三角元素,因此计算复杂度小、迭代收敛速度快;系统对结构相同但不同时处理数据的模块进行复用,节省了资源;在计算协方差矩阵和线性空间投影时对数据并行处理,所以系统时钟频率不受数据维数变化的影响。实验数据表明,该系统能实现对不同维数数据的主成分分析,时钟频率稳定,占用资源少。Principal component analysis（PCA） , which is a typical method of data dimensionality reduction, transforms high dimensional data to low dimensional data by eigenanalysis of the data matrix and loses little of information within the transformed data. A new architecture of FPGAs to realize PCA was demonstrated, which solved eigenanalysis of matrix by simple shift and addition operations with vector rotation of Givens and CORDIC algorithm, computing upper triangular elements only. Therefore, the computational complexity was low and the iterative convergence speed was fast. Moreover, the design reused some similar modules processing data asynchronously to save FPGA resources, and processed data in parallel during computing covariance matrix and linear space mapping, thus the clock frequency was not affected when the dimension of the original data was changed. The experiment results indicate that the system can implement PCA of different dimensional data with a stable clock frequency and a small amount of resources.

关 键 词：数据降维 主成分分析 矩阵的特征分析 FPGA 

分 类 号：O242.2[理学—计算数学]