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作 者:邱旭[1] 崔玉兴[1] 李剑锋[1] 余若祺[1] 张博闻[1]
机构地区:[1]中国电子科技集团公司第十三研究所,石家庄050051
出 处:《微纳电子技术》2008年第9期505-507,511,共4页Micronanoelectronic Technology
摘 要:介绍了一种GaAs高效率高线性大功率晶体管的设计、制作和性能,包括材料结构设计、电路的CAD优化设计、功率合成技术研究等。通过管芯的结构设计、材料优化,进行了GaAs微波大栅宽芯片的研制;通过内匹配技术对HPFET(high performance FET)管芯进行阻抗匹配,实现了器件的大功率输出;通过提高栅-漏击穿电压、降低饱和压降等手段提高器件的功率和附加效率;通过严格控制栅凹槽的宽度,实现了较好的线性特性。测试结果表明,器件在5.3-5.9GHz频段内,P1dB为45W,功率附加效率ηadd为41%,实现了预期的设计目标。The design, fabrication and performance of high efficiency and high linearity GaAs HPFETs (high performance FET) were described, including the design of material structure, the optimization of circuit CAD, power dividing/combining of the HPFET chips, etc. Through the structure design and material optimization of the chip, GaAs chips with large gate width was fabricated. Adopting internally matching technology, the impedance of HPFET chips was matched and high output power was obtained. In order to simultaneously obtain high-power and high-efficiency characteristics, the method that could increase the gate-drain breakdown voltage and reduce the knee voltage of the chip was employed. Meanwhile, the high linearity performance was obtained by strictly controlling the width of gate recess. The result shows that the internally matched power GaAs HPFET delivers a high P1dB of 45 W and a high power-added efficiency of 41% in 5.3 - 5.9 GHz . The prospective aim was achieved successfully.
分 类 号:TN304.23[电子电信—物理电子学] TN323.4
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