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出 处:《半导体技术》2008年第11期968-971,共4页Semiconductor Technology
摘 要:提出了一种部分耗尽SOI MOSFET体接触结构,该方法利用局部SIMOX技术在晶体管的源、漏下方形成薄氧化层,采用源漏浅结扩散,形成体接触的侧面引出,适当加大了Si膜厚度来减小体引出电阻。利用ISE-TCAD三维器件模拟结果表明,该结构具有较小的体引出电阻和体寄生电容、体引出电阻随器件宽度的增加而减小、没有背栅效应。而且,该结构可以在不增加寄生电容为代价的前提下,通过适当的增加Si膜厚度的方法减小体引出电阻,从而更有效地抑制了浮体效应。A novel body contact technique for partially depleted SOI MOSFET was proposed. Two thin buried-oxide layers under source/drain on a SOI chip were formed near the Si surface with low dose and low energy local SIMOX technology. And a body-under-source structure is easy to be formed because of the shallow source/drain junction depth in this structure, which has a thick Si film. From ISE-TCAD 3-D simulation results, this structure has little body resistance and body parasitic capacitance and has no back-gate effect. The body resistance decreases as channel width is increasing. Above all, this structure can reduce body resistance to suppress floating body-effect significantly by increasing Si film thickness, without affecting the parasitic capacitance.
分 类 号:TN386[电子电信—物理电子学]
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