超薄栅氧化层等离子体损伤的工艺监测  

Process Monitor of Plasma Charging Damage in Ultra-Thin Gate Oxide

作　　者：赵文彬[1,2] 李蕾蕾[1,2] 于宗光[2] 

机构地区：[1]西安电子科技大学微电子学院,陕西西安710071 [2]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《电子学报》2009年第5期947-950,956,共5页Acta Electronica Sinica

基　　金：江苏省高技术研究项目(No.BG2007006)

摘　　要：随着集成电路向深亚微米、纳米技术发展,等离子体充电对制造工艺造成的影响,尤其对超薄隧道氧化层的损伤越来越显著.本文分析了等离子体工艺损伤机理以及天线效应,设计了带有多晶、孔、金属等层次天线监测结构的电容和器件,并有不同的天线比.设计结构简单、完全工艺兼容,测试结果直观、测量灵敏度高等优点,实现了等离子体损伤芯片级工艺监控.测试分析表明,不同的膜层结构,等离子体损伤程度不同,当天线比大于103以后,充电损伤变得明显.同时测试也发现了工艺损伤较为严重的环节,为优化制造工艺,提高超薄栅氧化层抗等离子体损伤能力提供了科学的依据.With the development of IC to deep sub-micron and nanometer technology,plasma damage by charging to the CMOS devices, especially to the ultra thin gate oxide becomes more and more prominent. The mechanisms of plasma damage and antenna effect are analyzed in this paper.Capacitors and devices with different antenna ratio,composed of poly,contact and metal, are designed,and embed with process.And the test structures are discussed and those results are obvious and sensitive,achieving the wafer level process monitor of plasma charging damage in ultra-thin gate oxide. The results show that the plasma damage changes with process. Once the antenna ratio is over 10^3 ,the plasma damage becomes easily to be found.Meantime it could be found which process step induced the charging damage is serious, what studied in this paper offers scientific references to increase the gate oxide ability against the plasma charging damage.

关 键 词：栅氧化层 等离子体损伤 天线结构 工艺监测 

分 类 号：TN405[电子电信—微电子学与固体电子学]