一种改进型SUSAN算法的FPGA实现  

Implementation of An Improved SUSAN Algorithm on FPGA

作　　者：杨金孝[1] 赵强[1] 杨百平[1] 唐崇武[1] 

机构地区：[1]西北工业大学电子信息学院,陕西西安710072

出　　处：《信息安全与通信保密》2010年第3期57-59,共3页Information Security and Communications Privacy

摘　　要：针对边缘检测算法在图像处理领域的应用,选择了一种改进型SUSAN算法,并对其进行了FPGA实现。在实现过程中,合理选择了运算模板,并针对数据选择与存取以及流水线设计等问题给出了解决方案,包括模块复用、寄存器循环移位和流水线与缓存结合的处理方法,很大程度上降低了硬件资源的利用,节约了带宽。硬件实现结果表明,该方案具有资源占用率低、实时性强等优点。Aiming at the application of edge detection algorithm in image processing,an improved SUSAN algorithm is selected and implemented on FPGA.During this procedure,the operation template is appropriately chosen and,based on the issues of data selection,access,and pipeline design,the solution is proposed,including the module＇s multiplex,registers＇ circular shift and the combination technology of pipeline with line buffer.Such solution could fairly reduce the cost of hardware resource,save project bandwidth.The experiment results indicate that this scheme could lower source cost and improve real-time performance.

关 键 词：现场可编程门阵列 图像处理 边缘检测 

分 类 号：TP391.41[自动化与计算机技术—计算机应用技术]