100V N沟道VDMOS寄生电容研究  

Investigation into Parasitic Capacitance of 100 V N-Channel VDMOS

作　　者：唐昭焕[1] 刘勇[1,2] 胡永贵[1,2] 羊庆玲[1] 杨永晖[1,2] 谭开洲[1,2] 

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060 [2]模拟集成电路国家级重点实验室,重庆400060

出　　处：《微电子学》2010年第3期457-460,共4页Microelectronics

摘　　要：从结构上对一种N沟道VDMOS器件的寄生电容进行研究,确定了栅氧化层厚度和多晶线宽是影响VDMOS器件寄生电容的主要因素;使用TCAD工具,对栅氧化层厚度和多晶线宽的变化对各个寄生电容的影响进行半定量分析,得到栅氧化层厚度每变化1 nm,关断时间变化4.9ns和多晶线宽每变化0.2μm,关断时间变化2.7 ns的结论,与实际测试结果吻合较好。将该结论用于100 V/N沟道VDMOS器件关断时间的精确控制,关断时间控制精度达到±10 ns,满足VD-MOS芯片制造要求。Parasitic capacitance was analyzed by investigating structure of N-channel VDMOS.It has been demonstrated that thickness of gate-oxide and width of poly-silicon are main factors affecting parasitic capacitance of VDMOS.Effects of changing gate-oxide thickness and poly-silicon width were quasi-quantitatively analyzed using TCAD.Results showed that turn-off time changed by 4.9 ns and 2.7 ns,as gate oxide thickness and poly-silicon width changed by 1 nm and 0.2 μm,respecitvely,which is in agreement with measured results.The conclusion was used in production to precisely control turn-off time of actual 100 V/N-channel VDMOS,and turn-off time was controlled at an accuracy of ±10 ns,which meets the requirement for VDMOS fabrication.

关 键 词：VDMOS 寄生电容 关断时间 栅氧 多晶线宽 

分 类 号：TN432[电子电信—微电子学与固体电子学]