一种基于FPGA的嵌入式块SRAM的设计  

FPGA_based Design of Embedded SRAM Block

作　　者：胡小琴[1,2] 赵建明[1] 肖培磊[1,2] 

机构地区：[1]电子科技大学,成都610054 [2]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子与封装》2010年第6期15-18,共4页Electronics & Packaging

摘　　要：文章中提出了一种应用于FPGA的嵌入式可配置双端口的块存储器。该存储器包括与其他电路的布线接口、可配置逻辑、可配置译码、高速读写电路。在编程状态下,可对所有存储单元进行清零,且编程后为两端口独立的双端存储器。当与FPGA其他逻辑块编程连接时,能实现FIFO等功能。基于2.5V电源电压、chart0.22μm CMOS单多晶五铝工艺设计生产,流片结果表明满足最高工作频率200MHz,可实现不同位数存储器功能。This paper presents an application of an embedded dual-port block memory which can be configured in FPGA.The memory includes circuit wiring with the other blocks,configurable logic including configurable decoding,high-speed read and write abilities.In the programming state,it can be cleared of all storage units,and can be used for two separate ports of memory after programmed.When combined with other FPGA logic blocks,it can achieve functions such as FIFO.Based on 2.5V power supply voltage and chart 0.22μm CMOS singlepoly five aluminum production process design,the flow sheet results showed that it meets the highest operating frequency of 200MHz,and memory function can be realized in different digits.

关 键 词：存储器 FPGA 嵌入式 

分 类 号：TN702[电子电信—电路与系统]