纳米级SET/CMOS混合器件的研究进展  

Research Development of Nanoscale SET/CMOS Hybrid Devices

作　　者：冯朝文[1] 蔡理[1] 张立森[1] 

机构地区：[1]空军工程大学理学院,西安710051

出　　处：《微纳电子技术》2010年第9期525-531,共7页Micronanoelectronic Technology

基　　金：国家高技术研究发展计划(863计划)资助项目(2008AAJ225)

摘　　要：SET/CMOS作为一种单电子晶体管与纳米级CMOS混合结构的新兴纳米电子器件,不仅实现两者优势互补,而且其突出的功能特性极大影响着电路微型化发展的道路。从SET/CMOS的串联和并联两种基本结构出发,阐述了各自的工作原理与特性、进而介绍了该混合器件目前在实验室制备、电路设计以及数值模拟研究方面的现状,最后讨论了器件在发展中尚需解决的问题及其应用前景。SET/CMOS的容错电路及互连结构新型设计将会加速实用化的进程,使集成电路产生质的飞跃,进而有望实现超高密度的信息存储和超高速信息处理,并将在未来智能计算机、通信设备和自动化方面发挥重要作用。As an emerging nanoelectronic device combining a single electron transistor （SET） and a nanoscale CMOS, the SET/CMOS makes advantages of the complementary of SET and CMOS, and has a great effect on the development of micro-circuits due to its prominent function. Based on two basic structures of serial and parallel types on SET/CMOS hybrid nanodevices, their working principles and characteristics are introduced. Then, the development status of SET/CMOS is presented, including the fabrication techniques in laboratory, circuit design and numerical simulation. Finally, the existing problems and application prospect of SET/CMOS are discussed. The novel design schemes of the fault-tolerant circuit and connection architecture on SET/CMOS will be explored to accelerate the practical process, which will make integrate circuits develop greatly. It is expected to realize the ultra-high-density information storage and ultra-high-speed information processing, and SET/CMOS will play an important role in the future intelligent computers, communication apparatus and automatic machines.

关 键 词：单电子晶体管 量子效应 库仑阻塞 负微分电阻 多值逻辑 

分 类 号：TN386.1[电子电信—物理电子学]