一种实用的高压BiCMOS关键工艺技术研究  

Study on Key Techniques for High-Voltage BiCMOS Process

作　　者：唐昭焕[1] 刘勇[2] 王志宽[1] 谭开洲[2] 杨永晖[1] 胡永贵[2] 

机构地区：[1]中国电子科技集团公司第二十四研究所 [2]模拟集成电路重点实验室,重庆400060

出　　处：《微电子学》2010年第5期758-761,共4页Microelectronics

摘　　要：提出了一种实用的高压BiCMOS工艺。该工艺集成了高性能耗尽型NJFET、NPN、VPNP、高压NMOS、高压PMOS、NMOS、PMOS、齐纳二极管,以及铬硅电阻、磷注入电阻等有源和无源器件。NJFET的夹断电压为-1.5 V,击穿电压为17 V;高压MOS管的击穿电压为37 V;齐纳二极管在25μA时其反向击穿电压为5.5 V。使用该工艺,研制了一款低压差线性稳压器(LDO),基准源静态电流小于1.5μA。该工艺还可广泛应用于高压A/D、D/A转换器的研制。An applied high-voltage BiCMOS process was proposed,which integrated high-performance depletion-mode NJFET,NPN,VPNP,high-voltage NMOS/PMOS,standard NMOS/PMOS transistors,Zener diode and SiCr resistor,NRES resistor.In this process,NJFET with pinch-off voltage of about-1.5 V and breakdown voltage of about 17 V,high-voltage MOS transistors with breakdown voltage of about 37 V,and Zener diode with reverse voltage of about 5.5 V at 25 μA were obtained.Based on this process,a low drop-out（LDO）regulator was designed and fabricated,which had a reference quiescent current less than 1.5 μA.This process can also be used to fabricate high-voltage A/D and D/A converters.

关 键 词：线性兼容CMOS工艺 BICMOS工艺 NJFET VPNP 低压差线性稳压器 

分 类 号：TN303[电子电信—物理电子学]