模2^n-2^k-1加法器高效VLSI设计与实现  

Design and Implementation of High Efficient Modulo 2~n-2~k-1 Adder VLSI for RNS

作　　者：马上[1] 叶燕龙[1] 胡剑浩[1] 

机构地区：[1]电子科技大学通信抗干扰技术国家级重点实验室,四川成都610054

出　　处：《微电子学与计算机》2010年第10期1-7,共7页Microelectronics & Computer

基　　金：自然科学基金(60873076)

摘　　要：模加法器是余数系统(Residue Number System,RNS)的基本运算单元,2n-2k-1形式的余数基易于构建大动态范围和具有优良复杂度平衡性的多通道余数基.基于前缀运算和进位修正算法提出了一类新的模2n-2k-1加法通用算法及其VLSI实现结构.该算法消除了重复的进位信息计算,且可采用任意已有的前缀运算结构.与同类型模加法器的分析对比结果表明,提出的模2n-2k-1加法器具有优良的"面积×时延"特性.The design of high efficient modulo adders is important for DSP algorithms implemented by Residue Number System（RNS）.Moduli sets of this form 2n-2k-1 offer many advantages,such as larger dynamic range and excellent balance among the RNS channels.In this paper,a general algorithm and its VLSI implementation structure are proposed for the modulo 2n-2k-1 adder.The proposed algorithm is based on the techniques of prefix operation and carry correction,which eliminates the re-computation of carries.And any existing prefix operation structure can be adopted in the proposed structure.Compared with the same modulo 2n-2k-1 adders with different structures,the proposed modulo adder offers better ＂areadelay＂.

关 键 词：余数系统 模加法器 并行前缀 进位修正 超大规模集成电路 

分 类 号：TP338.6[自动化与计算机技术—计算机系统结构]