分布式源场极板结构射频LDMOS器件的设计  

Design of RF LDMOS with distributed source field plate

作　　者：陈文兰[1] 

机构地区：[1]东南大学苏州研究院高频高功率器件与集成技术研究中心,苏州215123

出　　处：《国外电子测量技术》2010年第11期38-41,共4页Foreign Electronic Measurement Technology

摘　　要：为了减小射频LDMOS器件中场极板寄生电容,提出一种具有分布式源场极板结构的射频LDMOS器件,给出了器件结构及工艺流程。借助微波EDA软件AWR对场极板进行了三维电磁仿真优化设计。仿真及测试结果表明,所设计的分布式源场极板结构在不影响器件击穿电压的条件下,能有效减小LDMOS器件寄生电容,提升器件增益、效率及线性度等射频性能。A novel RF LDMOS device with distributed source field plate is proposed to minish the parasitic capacitances of the field plate. The structure and process flow are presented. The field plate structure is optimized using the EDA soft- ware AWR. The simulation and test results indicate that, with this design, the parasitic capacitances of the LDMOS device are reduced, the RF performance as the gain, efficiency and linearity are improved.

关 键 词：射频LDMOS 场极板 寄生电容 射频性能 

分 类 号：TN386[电子电信—物理电子学]