基于VMM方法的SOC集成验证  

Integrated Verification for SOC Based VMM

作　　者：李磊[1] 罗胜钦[1] 

机构地区：[1]同济大学电子科学与技术系,上海201804

出　　处：《电子与封装》2011年第1期18-21,共4页Electronics & Packaging

摘　　要：随着集成电路规模和设计复杂度的快速增长,芯片验证的难度也不断加大,芯片验证的工作量达到了整个芯片研发的70%,已然成为缩短芯片上市时间的瓶颈。VMM是synopsys公司推出的基于systemverilog的一套验证方法学,已经成为SOC验证的主流方法学。SOC系统采用ARM9处理器和DSP处理器,基于AMBA总线架构。SOC验证包括集成验证和系统验证,相对于系统验证,集成验证具有运行速度快的特点,在芯片验证中极其重要。文中结合项目来介绍SOC集成验证,运用业界主流的VMM验证方法学并结合DesignWare VIP来搭建集成验证环境,通过VMM类的介绍来说明验证的过程,并提出验证环境归一化的思想。With the rapid growth of the scale of integrated circuit and the complexity of integrated circuit,the difficulty of verification for SOC is increasing.With Verification accounting for 70% of development of chip,Verification becomes a bottleneck problem to reduce chip time to market.VMM proposed by synopsys is a verification methodology based systemverilog.SOC system based on the AMBA bus architecture uses ARM9 processor and DSP processor.Verification of SOC includes System Verification and Integrated Verification.In this paper,the specific project uses the VMM verification methodology and DesignWare VIP for integration verification,introduce the class of VMM and proposes normalized thoughts of Verification environment.

关 键 词：VMM验证 SYSTEMVERILOG DesignWare VIP 系统芯片 

分 类 号：TN402[电子电信—微电子学与固体电子学]