An InGaAs/InP 40 GHz CML static frequency divider  

作　　者：苏永波 金智 程伟 葛霁 王显泰 陈高鹏 刘新宇 徐安怀 齐鸣 

机构地区：[1]Institute of Microelectronics,Chinese Academy of Sciences [2]Shanghai Institute of Microsystem and Information Technology,Chinese Academy of Sciences

出　　处：《Journal of Semiconductors》2011年第3期127-130,共4页半导体学报（英文版）

摘　　要：Static frequency dividers are widely used as a circuit performance benchmark or figure-of-merit indicator to gauge a particular device technology’s ability to implement high speed digital and integrated high performance mixed-signal circuits.We report a 2：1 static frequency divider in InGaAs/InP heterojunction bipolar transistor technology.This is the first InP based digital integrated circuit ever reported on the mainland of China. The divider is implemented in differential current mode logic（CML） with 30 transistors.The circuit operated at a peak clock frequency of 40 GHz and dissipated 650 mW from a single -5 V supply.Static frequency dividers are widely used as a circuit performance benchmark or figure-of-merit indicator to gauge a particular device technology’s ability to implement high speed digital and integrated high performance mixed-signal circuits.We report a 2：1 static frequency divider in InGaAs/InP heterojunction bipolar transistor technology.This is the first InP based digital integrated circuit ever reported on the mainland of China. The divider is implemented in differential current mode logic（CML） with 30 transistors.The circuit operated at a peak clock frequency of 40 GHz and dissipated 650 mW from a single -5 V supply.

关 键 词：INP DHBT static frequency divider 

分 类 号：TN772[电子电信—电路与系统]