SRAM供电结构与SOC芯片供电网络设计优化  

SRAM Power Distribution and SOC Power Mesh Design Optimize

作　　者：刘世勋[1] 万培元[1] 林平分[1] 邓尧之[1] 

机构地区：[1]北京工业大学北京市嵌入式系统重点实验室,北京100124

出　　处：《半导体技术》2011年第4期312-315,共4页Semiconductor Technology

基　　金：北京工业大学博士科研启动基金(X0002019201102)

摘　　要：主要提出了一种优化SRAM供电结构的方案——裸露Metal4的SRAM供电网络。该方案可以在不增加使用绕线资源的条件下,显著地提升SRAM的供电以及整个芯片供电网络的性能。以一款数字电视解调芯片BTV2020为例,详细叙述了传统SRAM的供电结构,提出一种SRAM的供电结构及实现方法,以及对比了优化后的SRAM供电结构与传统SRAM供电结构,所构建的供电网络的最差电源电压降。最后通过流片结果证明本方案是有效可行的。An on-chip SRAM power distribution optimized methodology was described, which is expose Metal4 SRAM power mesh. TSRAMs＇power supply and whole chip power mesh have been significantly improved by this methodology, but without consuming any redundant routing resources. The generation principle of this methodology was introduced by taking a SMIC 0. 18 μm digital TV demodulation chip as an example. Traditional SRAM power distribution, new SRAM power idstribution, methodology realization, and the worst IRdrop between traditional SRAM power distribution and new methodology were analyzed. Finally the validity of the method was proved by the tape out result.

关 键 词：静态存储器 电阻压降 片上系统 存储器 供电网络 

分 类 号：TN305.94[电子电信—物理电子学] TP331.11[自动化与计算机技术—计算机系统结构]