用于CMOS图像传感器内置流水线ADC的采样/保持电路  

A Sample/Hold Circuit for Built-in Pipelined ADC in CMOS Image Sensor

作　　者：李兆文[1] 魏廷存[1] 郑然[1] 

机构地区：[1]西北工业大学航空微电子中心,西安710072

出　　处：《微电子学》2011年第3期327-331,共5页Microelectronics

基　　金：2009年度国家自然科学基金资助项目(60972157)

摘　　要：设计了用于CMOS图像传感器内置流水线ADC的采样/保持电路,该电路具有10位采样精度和50 MHz采样速率,采用开关电容电荷重分布式结构,加入图像传感器的黑光校准功能。放大器采用全差分套筒式共源共栅增益增强型结构,保证了所需的增益和带宽。电路采用0.18μmCMOS工艺实现。HSPICE仿真结果表明,电路可在5 ns内达到0.05%的精度;对于24.0218 MHz、±0.5 V摆幅的正弦输入信号,SNDR和SFDR分别达到62.47 dB和63.73 dB,满足系统要求。A 10-bit 50 MHz sample/hold circuit for built-in pipelined ADC in CMOS image sensor was designed based on switched-capacitor charge redistribution structure.In this circuit,black level calibration for image sensor was incorporated.For amplifier,telescopic cascode gain-boosted structure was adopted to ensure desired gain and bandwidth.The sample and hold circuit was implemented in 0.18 μm CMOS technology.HSPICE simulation showed that the circuit settled to an accuracy within 0.05% in 5 ns;and it had an SNDR of 62.47 dB and an SFDR of 63.73 dB,respectively,for 24.0218 MHz input signal with ±0.5 V swing,which satisfied performance requirement of the system.

关 键 词：CMOS 图像传感器 流水线A/D转换器 采样保持电路 黑光校准 

分 类 号：TN432[电子电信—微电子学与固体电子学]