0.5μm SOI CMOS工艺开发与器件建模  

Development of a 0.5 μm SOI CMOS Process and Its Device Modeling

作　　者：张书霖[1] 陈磊[1] 严琼[1] 张伟[1] 刘盛富[1] 苏杰[1] 赖宗声[1,2] 石艳玲[1,2] 徐世美 杨飞 

机构地区：[1]华东师范大学微电子电路与系统研究所,上海200062 [2]上海贝岭股份有限公司,上海200233

出　　处：《微电子学》2011年第4期582-586,共5页Microelectronics

基　　金：上海市科委项目(08706200802;08700741300);上海重点学科建设资助项目(B4l1)

摘　　要：对0.5μmSOI CMOS工艺进行了开发,得到一套完整良好的工艺流程参数。根据流片测试结果,进行SOI CMOS器件的建模;利用BSI MproPlus软件中的BSI MSOI MOS模型,根据MOS管宽长比进行器件分类和建模,得到模型参数。对于部分耗尽SOI器件的固有浮体效应和kink效应,采用体接触方法来缓解其负面影响。A 0.5 μm SOI CMOS technology was developed,and a complete set of optimized process parameters was obtained.Based on measured data of devices fabricated with the process,SOI CMOS device modeling was made.With BSIMSOI MOS Model in BSIMproPlus,model parameters were obtained by classifying devices according to their breadth/length ratio.Moreover,body-contacting technology was adopted to relax negative influence of the floating body effect and kink effect in partially depleted SOI devices.

关 键 词：绝缘体上硅 CMOS 器件建模 浮体效应 

分 类 号：TN386.1[电子电信—物理电子学]