低功耗10Gb/sCMOS4:1复接器  

Low Power 10 Gb/s CMOS 4∶1 Multiplexer IC

作　　者：缪瑜[1] 冯军[1] 张立国[1] 章丽[1] 

机构地区：[1]东南大学射频与光电集成电路研究所,江苏南京210096

出　　处：《军事通信技术》2005年第S1期71-76,共6页Journal of Military Communications Technology

摘　　要：采用TSMC0.18μmCMOS工艺实现低功耗10Gb/s4∶1复接器。整个系统采用树型结构,由两个低速2∶1复接单元,一个高速2∶1复接单元,分频器,数据及时钟输入输出缓冲组成,低速的复接单元采用动态双相伪NMOS逻辑实现,高速的复接单元采用SCFL逻辑实现。工作速度最高达12.5Gb/s,供电电压1.8V,功耗小于180mW,芯片面积为0.89×0.7mm2。This paper described a 10 Gb/s 4∶1 multiplexer using TSMC 0.18 μm CMOS process with low power. The system was constructed in tree forms including two low speed 2∶1 multiplexer cells, a high speed 2∶1 multiplexer cell, divider, input and output buffers for data and clock. A dual-phase dynamic-pseudo NMOS logic was proposed for low speed multiplexer while MOS current mode logic for high speed multiplexer. Output data speed was up to 12.5 Gb/s with 1.8 V supply voltage. Power consumption of the chip was less than 180 mW, and Die area equaled 0.89×0.7 mm^2. It is superior to congener chips in speed, power consumption and area.

关 键 词：源极耦合逻辑 复接器 低功耗 光纤通信 

分 类 号：TN432[电子电信—微电子学与固体电子学]