微纳米CMOS VLSI电路可靠性仿真与设计  

Micro-Nanometer CMOS VLSI Circuit Reliability Modeling,Simulation and Design

作　　者：罗俊[1,2] 郝跃[2] 秦国林[1] 谭开洲[3] 王健安[1] 胡刚毅[3] 许斌[1] 刘凡[1] 黄晓宗[1] 唐昭焕[3] 刘勇[1] 

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060 [2]西安电子科技大学微电子学院,西安710071 [3]模拟集成电路重点实验室,重庆400060

出　　处：《微电子学》2012年第2期255-260,共6页Microelectronics

摘　　要：介绍了CMOS VLSI的可靠性建模和仿真技术的发展历史、相应的仿真工具、失效机理等效电路和算法,重点总结了当前最新的CMOS超大规模集成电路可靠性建模仿真技术,为促进我国集成电路可靠性设计水平起到积极的作用。An overview was made on reliability modeling and simulation of CMOS VLSI circuits.The evolution history,simulation tools,failure mechanism equivalent circuits and algorithms were described.Latest development of technologies for reliability modeling and simulation of CMOS VLSI was summarized in particular.And finally,suggestions were made to improve reliability design level of domestic IC designers.

关 键 词：微纳米CMOS 超大规模集成电路 可靠性建模 可靠性仿真 

分 类 号：TN47[电子电信—微电子学与固体电子学]